This invention relates to an apparatus and method for the testing of semiconductor devices, and in particular to the testing of such devices when attached to a leadframe and before they are formed.
Semiconductor circuits are initially manufactured as wafers. A circular wafer of a semiconductor material such as silicon is formed with a plurality of individual circuits each of which is called a die (pl. dice). After the dice are formed on the wafer, the wafer is cut so as to separate the dice from each other and each die is then assembled into a semiconductor package with bond wires connecting the bond pads of a die with the pins of the package. A number of tests on the dice are carried out at various stages in the process. In particular, for example, a test of the devices while they are still part of the wafer is carried out. This test is known as a wafer test and is used to discard dies that have been incorrectly formed.
Once the die is assembled in a package it is tested again to ensure that the package has been properly assembled and that no damage has occurred to the die during the assembly and processing and to verify that the device still meets its design specifications. This test may be carried out at several different temperatures to check parameters that may be temperature sensitive. For example commercial devices may be tested at 0xc2x0 C., 25xc2x0 C. and 70xc2x0 C. Devices intended for military applications may be tested at more extreme temperatures still, for example xe2x88x9255xc2x0 C., 25xc2x0 C. and 125xc2x0 C.
In summary, the testing of semiconductor devices is an important part of the manufacturing process, and in order to prevent the processing time being seriously delayed, methods and apparatus need to be designed that facilitate the testing of such semiconductor devices in the most time-efficient and reliable manner possible.
When the dies are assembled into semiconductor packages, the packages are conventionally formed as part of what is called a leadframe. In the past a leadframe may include a single row of semiconductor packages, more recently however leadframes may include two or more rows of packages such that the semiconductor packages are arranged in an array. When they are attached to the leadframe, the packages are electrically isolated from each other and are physically connected to the leadframe by one or more tie bars. In this condition the devices are conventionally referred to as being non-singulated semiconductor devices.
A difficulty in testing devices in a non-singulated condition is that as semiconductor devices are becoming small and thinner than before, the leadframe is therefore correspondingly becoming thinner. A relatively thin leadframe supporting a densely packed array of thin semiconductor devices is fairly pliant and can be susceptible to buckling and potential damage. It is therefore important to handle the leadframe carefully during any testing procedure.
A number of prior proposals exist for the testing of such non-singulated semiconductor devices. One example is shown in U.S. Pat. No. 5,008,615 (Littlebury). In this apparatus and method, however, although the devices are non-singulated, they are nonetheless partially formed in the sense that the leads extending from the package are trimmed and are then bent downwardly (ie out of the plane of the leadframe) so as to contact a test head.
Another example of the prior art is shown in U.S. Pat. No. 5,440,231 (Sugai). In this arrangement a leadframe bearing non-singulated semiconductor devices is lowered onto a test fixture. While this arrangement does not require the devices to be partially formed, nevertheless the test fixture has a complex cantilevered and test lead structure for bringing the test fixture contact heads into contact with the leads of the packaged device. However, this apparatus can only test a single packaged semiconductor device at a time. In this arrangement a conductive traces board or printed board is located under the test fixture (test lead) while a loadboard is placed under the conductive traces board. This is to shorten the connection between the DUT (Device Under Test) the probe. This type of layout will require a lot of space therefore, and this makes it difficult to implement multiple and simultaneous test in a strip. Also known in the prior art is related patent U.S. Pat. No. 5,961,650.
According to the present invention there is provided apparatus for supporting during a testing operation a leadframe formed with at least one row of non-singulated semiconductor devices, comprising a main body and a leadframe support member, wherein said leadframe support member is formed with at least one groove for receiving said semiconductor devices such that in use leads extending from said devices lie on a surface of said support member.
Preferably the leadframe support member may be formed with a plurality of parallel grooves to enable the support member to support one or more strips of devices.
In a preferred embodiment the apparatus may comprise means for releasably gripping a leadframe so as to hold the leadframe in place. This gripping means may comprise a pair of gripping members disposed on respective sides of the groove, and means may be provided for moving the gripping members into and out of engagement with a leadframe. The moving means may be actuated a compressed air. A plurality of pairs of gripping members may be provided, and the compressed air is provided directly to one pair and is distributed to the other pairs by an air distribution assembly formed in the main body.
The main body is preferably formed of a conducting material and is provided with means for electrically grounding the main body. The leadframe support member is preferably formed of a high resistivity electrically insulating material.
Viewed from another aspect the present invention provides apparatus for testing non-singulated semiconductor devices formed on a leadframe with unformed leads extending from said devices, comprising:
(a) carrier means for carrying said leadframe,
(b) a loading position at which a leadframe is loaded on a said carrier,
(c) means for transporting a loaded said carrier to and from a testing means,
(d) means for supporting said leads during a testing operation,
(e) means for removing said leadframe from said carrier after testing, and
(f) means for returning an unloaded said carrier to said leadframe loading position.
The transporting means preferably transports the carrier in a first horizontal direction, and the returning means comprises means for transporting an unloaded carrier in a direction opposite to the first direction and at a height below the first direction. The loading station is at the same height as said returning means and means are provided for elevating a loaded carrier to the transporting means. Means may be provided for receiving a carrier at the end of the transporting means and for lowering a carrier to the returning means.
Viewed from a still further aspect the present invention provides a method for testing non-singulated semiconductor devices having unformed leads extending therefrom and being formed on a leadframe, comprising locating said leadframe on a support surface of a carrier such that said leads lie flat on said support surface, transporting said carrier to a testing means, testing said devices while said leads remain flat on said surface, transporting said carrier away from said testing means, and removing said leadframe.